Area Contamination: Any foreign particles or material that are found on the surface of a wafer. This is viewed as discolored or smudged, and it is the result of stains, fingerprints, water spots, etc.
Azimuth, in Ellipsometry: The angle measured between the plane of incidence and the major axis of the ellipse.
Acceptor: An element, such as boron, indium, and gallium used to create a free hole in a semiconductor. The acceptor atoms are required to have one less valence electron than the semiconductor.
Alignment Precision: Displacement of patterns that occurs during the photolithography process.
Anisotropic: A process of etching that has very little or no undercutting.
Backside: The bottom surface of a silicon wafer. (Note: This term is not preferred; instead, use ‘back surface’.)
Base Silicon Layer: The silicon wafer that is located underneath the insulator layer, which supports the silicon film on top of the wafer.
Bipolar: Transistors that are able to use both holes and electrons as charge carriers.
Bonded Wafers: Two silicon wafers that have been bonded together by silicon dioxide, which acts as an insulating layer.
Bonding Interface: The area where the bonding of two wafers occurs.
Buried Layer: A path of low resistance for a current moving in a device. Many of these dopants are antimony and arsenic.
Buried Oxide Layer (BOX): The layer that insulates between the two wafers.
Carrier: Valence holes and conduction electrons that are capable of carrying a charge through a solid surface in a silicon wafer.
Chemical-Mechanical Polish (CMP): A process of flattening and polishing wafers that utilizes both chemical removal and mechanical buffing. It is used during the fabrication process.
Chuck Mark: A mark found on either surface of a wafer, caused by either a robotic end effector, a chuck, or a wand.
Cleavage Plane: A fracture plane that is preferred.
Crack: A mark found on a wafer that is greater than 0.25 mm in length.
Crater: Visible under diffused illumination, a surface imperfection on a wafer that can be distinguished individually.
Crosstalk: Unrelated circuits on a board interacting with one another. Ultimately causes device malfunction.
Conductivity (electrical): A measurement of how easily charge carriers can flow throughout a material.
Conductivity Type: The type of charge carriers in a wafer, such as “N-type” and “P-type”.
Contaminant, Particulate: (see light point defect)
Contamination Area: An area that contains particles that can negatively affect the characteristics of a silicon wafer.
Contamination Particulate: Particles found on the surface of a silicon wafer.
Crystal Defect: Parts of the crystal that contain vacancies and dislocations that can have an impact on a circuit’s electrical performance.
Crystal Indices: (see Miller indices)
Depletion Layer: A region on a wafer that contains an electrical field that sweeps out charge carriers.
Dimple: A concave depression found on the surface of a wafer that is visible to the eye under the correct lighting conditions.
Donor: A contaminate that has donated extra “free” electrons, thus making a wafer “N-Type”.
Dopant: An element that contributes an electron or a hole to the conduction process, thus altering the conductivity. Dopants for silicon wafers are found in Groups III and V of the Periodic Table of the Elements.
Doping: The process of the donation of an electron or hole to the conduction process by a dopant.
Edge Chip and Indent: An edge imperfection that is greater than 0.25 mm.
Edge Exclusion Area: The area located between the fixed quality area and the periphery of a wafer. (This varies according to the dimensions of the wafer.)
Edge Exclusion, Nominal (EE): The distance between the fixed quality area and the periphery of a wafer.
Edge Profile: The edges of two bonded wafers that have been shaped either chemically or mechanically.
Etch: A process of chemical reactions or physical removal to rid the wafer of excess materials.
Fixed Quality Area (FQA): The area that is most central on a wafer surface.
Flat: A section of the perimeter of a wafer that has been removed for wafer orientation purposes.
Flat Diameter: The measurement from the center of the flat through the center of the wafer to the opposite edge of the wafer. (Perpendicular to the flat)
Four-Point Probe: Test equipment used to test resistivity of wafers.
Furnace and Thermal Processes: Equipment with a temperature gauge used for processing wafers. A constant temperature is required for the process.
Front Side: The top side of a silicon wafer. (This term is not preferred; use front surface instead.)
Goniometer: An instrument used in measuring angles.
Gradient, Resistivity: (not preferred; see resistivity variation)
Groove: A scratch that was not completely polished out.
Hand Scribe Mark: A marking that is hand scratched onto the back surface of a wafer for identification purposes.
Haze: A mass concentration of surface imperfections, often giving a hazy appearance to the wafer.
Hole: Similar to a positive charge, this is caused by the absence of a valence electron.
Ingot: A cylindrical solid made of polycrystalline or single crystal silicon from which wafers are cut.
Laser Light-Scattering Event: A signal pulse that locates surface imperfections on a wafer.
Lay: The main direction of surface texture on a wafer.
Light Point Defect (LPD): (Not preferred; see localized light-scatterer)
Lithography: The process used to transfer patterns onto wafers.
Localized Light-Scatterer: One feature on the surface of a wafer, such as a pit or a scratch that scatters light. It is also called a light point defect.
Lot: Wafers of similar sizes and characteristics placed together in a shipment.
Majority Carrier: A carrier, either a hole or an electron that is dominant in a specific region, such as electrons in an N-Type area.
Mechanical Test Wafer: A silicon wafer used for testing purposes.
Microroughness: Surface roughness with spacing between the impurities with a measurement of less than 100 μm.
Miller Indices, of a Crystallographic Plane: A system that utilizes three numbers to identify plan orientation in a crystal.
Minimal Conditions or Dimensions: The allowable conditions for determining whether or not a wafer is considered acceptable.
Minority Carrier: A carrier, either a hole or an electron that is not dominant in a specific region, such as electrons in a P-Type area.
Mound : A raised defect on the surface of a wafer measuring more than 0.25 mm.
Notch: An indent on the edge of a wafer used for orientation purposes.
Orange Peel: A roughened surface that is visible to the unaided eye.
Particle: A small piece of material found on a wafer that is not connected with it.
Particle Counting: Wafers that are used to test tools for particle contamination.
Particulate Contamination: Particles found on the surface of a wafer. They appear as bright points when a collineated light is shined on the wafer.
Pit: A non-removable imperfection found on the surface of a wafer.
Point Defect: A crystal defect that is an impurity, such as a lattice vacancy or an interstitial atom.
Premium Wafer: A wafer that can be used for particle counting, measuring pattern resolution in the photolithography process, and metal contamination monitoring. This wafer has very strict specifications for a specific usage, but looser specifications than the prime wafer.
Primary Orientation Flat: The longest flat found on the wafer.
Process Test Wafer: A wafer that can be used for processes as well as area cleanliness.
Profilometer: A tool that is used for measuring surface topography.
Resistivity (Electrical) : The amount of difficulty that charged carriers have in moving throughout material.
Required: The minimum specifications needed by the customer when ordering wafers.
Roughness: The texture found on the surface of the wafer that is spaced very closely together.
Saw Marks: Surface irregularities
Scan Direction: In the flatness calculation, the direction of the subsites.
Scratch: A mark that is found on the wafer surface.
Secondary Flat: A flat that is smaller than the primary orientation flat. The position of this flat determines what type the wafer is, and also the orientation of the wafer.
Site: An area on the front surface of the wafer that has sides parallel and perpendicular to the primary orientation flat. (This area is rectangular in shape)
Site Array: a neighboring set of sites
Slip: A defect pattern of small ridges found on the surface of the wafer.
Smudge: A defect or contamination found on the wafer caused by fingerprints.
Striation: Defects or contaminants found in the shape of a helix.
Subsite, of a Site: An area found within the site, also rectangular. The center of the subsite must be located within the original site.
Surface Texture: Variations found on the real surface of the wafer that deviate from the reference surface.
Test Wafer: A silicon wafer that is used in manufacturing for monitoring and testing purposes.
Thickness of Top Silicon Film: The distance found between the face of the top silicon film and the surface of the oxide layer.
Top Silicon Film: The layer of silicon on which semiconductor devices are placed. This is located on top of the insulating layer.
Total Indicator Reading (TIR): The smallest distance between planes on the surface of the wafer.
Virgin Test Wafer: A wafer that has not been used in manufacturing or other processes.
Void: The lack of any sort of bond (particularly a chemical bond) at the site of bonding.
Waves: Curves and contours found on the surface of the wafer that can be seen by the naked eye.
Waviness: Widely spaced imperfections on the surface of a wafer.
0 to 9
3D Stacked LSI
A three-dimensional LSI featuring a stack of IC chips. Some are simply made by stacking chips, like multi-chip package (MCP) and package on package (PoP), while others require making through-silicon vias that are as small as several micrometers in diameter, as in the case of wafer level and chip-on-wafer packaging.
Analog
An analog format is used to represent continuously variable physical quantities, including time, length, speed, and voltage. For example, mechanical clocks with the hour and minute hands display time in an analog format, whereas digital clocks use digits (i.e., numbers).
Architecture
In computer science, architecture means the basic design principles of computing systems. Architecture primarily refers to a hardware configuration, but it can also include other basic elements such as the word length, addressing method, operating system, and language.
ASIC
Application Specific Integrated Circuit
A type of semiconductor device customized or semi-customized to suit a customer’s particular requirements. Examples of semi-customized ASICs include gate arrays, standard cells, and field programmable gate arrays (FPGAs).
Bare Chip
A semiconductor chip that has been diced from the wafer but not yet packaged.
BGA
Ball Grid Array
A type of chip carrier used for IC packaging. It has a matrix of solder balls under the package that serves as output terminals. The device is placed on a printed circuit board and heated until the solder balls melt to form connections. Because a BGA can provide numerous interconnection pins, it is often used for packaging LSIs.
Bi-CMOS
Bipolar-Complementary Metal-Oxide Semiconductor
An integrated circuit that integrates bipolar transistors and CMOS on a single chip. A Bi-CMOS chip combines high speed and high current drive capability of bipolar transistors with low power consumption of CMOS. It was commonly used for standard logic devices such as the 7400 series.
Bio Chip
A microfluidic device used for biomedical purposes, made with microfabrication technologies developed for semiconductors and MEMS. Micro total analysis system (μTAS) and DNA chip are among its subcategories. The chip’s applications include genomic analysis and blood analysis.
Blue Violet Laser Diode
A laser diode that emits light at the wavelength of around 410 nm. It is used as the light source for Blu-ray and other optical discs. The Blu-ray Disc format uses the 405 nm wavelength for reading/writing data.
Burn In
A process by which components of a system are exercised for a certain period of time before placed in service. The process tests the reliability of ICs and LSIs and eliminates substandard or defective products. The test may be conducted in a high-temperature environment to obtain results in a relatively short time.
Capacitor
An electrical component with a dielectric material sandwiched between two metal terminals. When a voltage is applied to a capacitor, it stores electrical charge proportionate to the voltage level, and this effect (called capacitance) is used to smooth out the rectified current and suppress electrical noise. In a DRAM, capacitors are used as a memory cell device, with charged capacitors representing “1” and uncharged capacitors representing “0.” Also, capacitors block direct current while allowing alternating current to pass.
Carbon Nanotube
Carbon nanotubes refer to tubular microstructures formed by one or more layers of carbon sheet called graphene. Carbon nanotubes were discovered in 1991 by Sumio Iijima, who was a researcher at NEC’s lab in Tsukuba. Those with a single layer of graphene are called single-walled nanotubes (SWNTs), whereas those with two layers and those with more than one layer are referred to as double-walled nanotubes (DWNTs) and multi-walled nanotubes (MWNTs), respectively. Carbon nanotubes are highly promising as the next-generation semiconductor materials.
CCD
Charge-Coupled Device
An image sensing device that serves as an electronic eye. It has an array of light sensitive elements that generates electrical charges when exposed to light. The charges are consecutively transferred to adjacent elements until they reach the end of the line to be processed. CCDs are commonly used in digital cameras and scanners.
Chip
A piece of substrate made of silicon or other materials on which electronic devices or circuits are implemented. A chip is also called a pellet or a die in the manufacturing processes. Often a finished and packaged IC is referred to as a chip.
CIS
CMOS Image Sensor
A low-power image sensor based on CMOS sensor technology. A CIS consumes only about 1/10 of power needed for a CCD, operates with a single voltage supply, and can integrate peripheral circuits on the same chip.
Clean Room
A space with a controlled level of contamination for manufacturing ICs. Filtered air flows downward from the clean room ceiling toward the floor in a constant stream. An especially high level of cleanliness is required for the front-end-of-line (FEOL) processes.
CMOS
Complementary Metal-Oxide Semiconductor
A device that combines a p-type MOSFET (PMOS) and an n-type MOSFET (NMOS) so they complement each other. Unlike single-type PMOS and NMOS devices, a CMOS conducts very little current except while switching between on and off states, which makes it ideal for implementing low-power logic circuits. CMOS is the mainstream of current LSI technology.
CMP
Chemical Mechanical Polishing
A technology/tool for planarizing the wafer surface by combining chemical reactions and mechanical polishing. In a typical CMP process, a wafer is pressed against a rotating table covered with a polishing pad, while a slurry containing colloidal silica abrasives is deposited between the wafer and the pad. A non-abrasive slurry may be used depending on the wafer surface material to be removed.
COB
Chip On Board
A method for attaching a bare LSI chip directly onto the printed circuit board (PCB). The chip’s electrodes and the PCB are interconnected either by wire bonding or flip-chip bonding.
COG
Chip On Glass
A method for mounting a bare liquid crystal display (LCD) driver chip directly onto a glass substrate. Compared to the widely used tape carrier package (TCP) method, COG requires fewer parts and process steps.
Compound Semiconductor
A compound semiconductor is a semiconductor composed of two or more elements. Examples include gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), and cadmium sulfide (CdS) semiconductors. Compound semiconductors are suitable for high-frequency, high-speed devices such as mobile phones.
Copper Interconnect
Copper interconnects were a technology which was introduced by IBM as a solution to the decrease in interconnect delay for highly scaled semiconductor devices, and have become the mainstream in interconnects for logic devices.
CPU
Central Processing Unit
A semiconductor chip that serves as the brain of a computer. It consists of a control unit, an arithmetic/logic unit, a register where the output of operations is temporarily stored, an interface with storage units, and input/output interfaces with peripherals. A CPU fulfills the first two of the five basic computer functions defined by John von Neumann (arithmetic/logic, control, memory, input, and output).
CSP
Chip Size Package, or Chip Scale Package
A tight-fitting IC package that is very close to the size of the chip. It was made possible by advancements in the wiring technology and innovations in the integration technology. CSPs help make small electronics like mobile phones even smaller and lighter.
CVD
Chemical Vapor Deposition
A chemical process for producing thin films of required materials on the surface of a substrate. Specifically, gases containing the desired materials are introduced in the reaction chamber, and chemical reactions are induced to deposit thin films on the substrate. In semiconductor production processes, CVD is used for depositing interconnect materials and dielectric films ne
Design In
An approach to semiconductor product development that involves early cooperation between a manufacturer and its marketers and users to ensure the designs are optimal for practical use. Even more radical approaches are emerging lately, including “concept in” and “research in,” which call for third party involvement at the product planning stage or earlier.
Diode
A diode originally referred to a vacuum tube with two electrodes, but today it refers to a two-terminal electronic device, typically made of a semiconductor with a p-n junction. Diodes are used in many electronic devices as rectifiers. They are also representative discrete semiconductors.
DIP
Dual Inline Package
A type of IC package with a rectangular housing and two parallel rows of electrical connecting pins, giving it a centipede-like appearance. It was the most common package type in the early days of ICs.
Discrete
An adjective used to describe types of semiconductor devices that perform a single function, such as transistors and diodes as opposed to integrated circuits. It is also used to describe digital electric signals, because digital signals are sampled and quantized, meaning that they are not continuous either on the time or amplitude axis.
DRAM
Dynamic Random Access Memory
A type of semiconductor memory used in the main storage unit of a computer or as large-capacity working memory of other electronic devices. It is the most common type of memory that allows data to be read or written instantly as needed. A DRAM stores each bit of data in a cell consisting of a pair of a MOS transistor and a capacitor. When a bit of data is stored, the capacitor in the cell changes its state to either charged or discharged, representing the value 0 or 1 in the binary numeral system. To prevent the capacitor charge from fading through data reading and natural leakage, DRAM needs periodical refreshing.
DSP
Digital Signal Processor
A microprocessor capable of performing large numbers of multiplications at high speeds for quantization and other processes used in digitizing image and sound signals. A DSP typically has a high-speed data bus and a multiplier. Many advanced microprocessors today serve similar functions, however, making the conventional definition of DSP less pertinent.
EDA
Electronic Design Automation
A computer-assisted process for automatically designing semiconductors and electronic circuits. Also refers to dedicated tools (hardware and software) designed to serve this purpose. EDA covers the entire segments to be designed, including specifications, functions, logic, circuits, and layout.
Electron Beam
An electron beam is a stream of electrons, which are typically induced thermally from a cathode and flow to an anode. In electron beam processing, the flow of electrons is accelerated by electric fields, and as it strikes the target the material is drilled or welded as appropriate.
Eleven Nines
Eleven nines means 99.999999999%. When used in reference to a material, it means having a purity of 99.999999999%. Production of semiconductor devices such as ICs requires materials that are “eleven nines” pure. Silicon, a representative semiconducting material, becomes nearly nonconductive at this level of purity.
Embedded Array
A variation of ASIC that combines the advantages of a gate array and a standard cell. An embedded array is basically a gate array embedded with some high value-added cells.
Epitaxial Growth
Epitaxial growth, or epitaxy, refers to the deposition of a crystalline overlayer (epitaxial layer) on a crystalline substrate. The crystal orientation of the epitaxial layer depends on the structure of the substrate and seed crystals. Epitaxy is used for manufacturing Si ingots and for depositing suitable crystal layers on the wafer surface.
EPL
Electron Projection Lithography
A technology for scaling down and transferring the mask pattern onto the wafer surface by means of electron beams. ELP enables high resolutions and deep DOF (depth of focus), and is suitable for transferring resist mask patterns to form contact holes with a high aspect ratio.
EPROM
Erasable Programmable Read Only Memory
A type of semiconductor memory chip on which data can be written and erased a certain number of times. An EPROM is basically a read-only memory that can be reprogrammed. The data can be typically erased by exposing the chip to intense ultraviolet light through a transparent opening on the package. In addition to this type of EPROM (referred to as UVEPROM), the Electrically Erasable Programmable Read-Only Memory (EEPROM) was also developed to provide an electrical erase function. Both types of EPROM were used widely, but have been replaced by flash memory in recent years.
Esaki Diode (Tunnel Diode)
A type of semiconductor that uses the quantum tunneling effect. It was invented by Leona (Leo) Esaki in 1957. When a forward-biased current flows through this diode and the voltage is gradually increased, negative resistance is produced at a certain voltage range, meaning the current decreases as the voltage gets higher. In fact, oscillators and amplifiers equipped with Esaki diodes delivered far superior performance than those with conventional diodes.
Etching
A process of chemically removing from wafer surface part of the layers that is not covered by the patterned resist. There are two types of etching: liquid-based “wet” etching and plasma-based “dry” etching.
Etching Equipment
A type of machinery used for etching the surface of semiconductor wafers to form set patterns of metal interconnects, lead frames, printed circuit boards, etc. Also called an etcher. The terms etching equipment and etcher typically refer to plasma-based dry etching systems.
EUV Lithography
Extreme Ultraviolet Lithography
A lithography technology using the 13.5 nm extreme ultraviolet wavelength along with reflective masks and mirrors. EUV is capable of delivering the highest pattern resolutions among all optical lithography technologies. Because the light’s intensity is diminished at each reflection, however, a high-powered EUV light source is needed to raise productivity, a problem that still needs to be addressed.
FED
Field Emission Display
A type of next-generation flat panel display that uses an array of submicron electron emitters to display an image on the screen. The operating principle is the same as that of a cathode ray tube. FEDs can be made flat and large-sized, and are self-light-emitting.
FET
Field Effect Transistor
A transistor that uses an electric field created by the gate terminal voltage to check the flow of electrons or holes, thereby controlling the current between the source and drain terminals.
Flash Memory
An advanced form of electrically erasable programmable read-only memory (EEPROM). Flash memory is non-volatile and the data on the device can be freely rewritten. Flash memory devices are more convenient to use than UVEPROMs that require ultraviolet light to erase data.
FPGA
Field Programmable Gate Array
A type of semi-customized IC that is highly integrated, has excellent functionality and numerous I/Os, and can be easily configured by customers. Because FPGA’s programmability feature significantly shortened the customers’ product development cycle, FPGAs soon captured a large share of the gate array market.
Fullerene
A term referring to a cluster of uniquely structured carbon atoms. The first fullerene molecule discovered in 1985 consisted of 60 carbon atoms in a shape of a soccer ball. Among those who discovered fullerene, Harold Kroto, Richard Smalley, and Robert Curl received the Nobel Prize in Chemistry in 1996.
Gallium Arsenide (GaAs)
A representative III-V semiconductor compound. Electrons move within GaAs crystals 5-6 times faster than in silicon, which makes the compound a suitable material for high-frequency, high-speed analog devices. Representative GaAs applications include GaAs FETs, infrared LEDs, and laser diodes.
Gallium Arsenide Integrated Circuit (GaAs IC)
Gallium Arsenide Integrated Circuit (GaAs IC)
A type of IC that uses GaAs as a substrate. When it was introduced, GaAs IC was considered to be potentially faster than silicon ICs, although the latter turned out to be the mainstream today. GaAs ICs are often used in mobile phones and high-frequency communication devices.
GaN LED
Gallium Nitride-Based Light Emitting Diode
An LED that uses semiconductor materials containing gallium nitride (GaN) (such as InGaN) for an epitaxial layer. It uses a sapphire substrate and emits blue and ultraviolet light at the wavelength of around 450 nm. A GaN LED can produce white light when overlaid with a fluorescent material or used with green and red LEDs.
Gate
A transistor component that turns the electric current flowing through the semiconductor channel on and off. Generally speaking, the performance of a transistor improves as the gate length becomes shorter. It was for this reason that the gate length used to be used as a label of semiconductor technology node.
Gate Array
The earliest type of semi-custom IC. It uses a master wafer on which basic cells are prefabricated but not interconnected. Once the logic circuit specifications and the timing chart are received from the customer, the chip supplier uses CAD to quickly implement the design.
Giant Magnetoresistive Effect
An exceptional magnetoresistive effect discovered in 1988. While the magnetoresistance of common metals is in the range of several percent, that of multi-layered conductors consisting of about 1 nm-thick ferromagnetic and non-ferromagnetic layers can be as high as several tens of percent. The giant magnetoresistive effect is most notably applied to magnetic heads of hard disk drives.
Graphene
A sheet of carbon consisting of a single layer of carbon atoms arranged in a hexagonal lattice. Graphene is the basic structural element of carbon allotropes including carbon nanotubes and fullerenes.
High Power Red Laser Diode
DVD writers require a red laser (650 nm) diode with high power output of 100 mW or more. A 100 mW diode supports up to 2X writing speeds, while an output of 250 mW is needed for the 16X writing speed. Writing onto dual layer DVDs requires an output of 300 mW or more.
High-K Material
A material with a high dielectric constant (k). High-k materials are used in dielectric films for logic gates and DRAM capacitors to improve transistor performance and DRAM capacitance.
Hole
When an electron in a semiconductor is excited from the valence band into the conduction band or caught by an acceptor, it leaves in its place a vacancy with a net positive charge. This absence of an electron is called a hole (or an electron hole). A hole acts like a positively charged particle.
Hybrid Integrated Circuit
An electronic circuit consisting of semiconductor devices (such as transistors and diodes) and passive devices (such as capacitors and resistors) embedded on a single ceramic substrate. A hybrid circuit can take advantage of the features of its component devices, while enjoying greater reliability than when the components are discretely mounted on a printed circuit board. Hybrid integrated circuits are often used for high-voltage, high-frequency applications.
I-Line Lithography
Photolithography that uses 365 nm wavelength radiation for exposure. The term “i-line” refers to the high-intensity line at 365 nm in the mercury-arc lamp spectrum. I-line lithography came into full use at around the 0.5 µm design rule node, and was the mainstream up to the 0.35 µm node.
IGBT
Insulated Gate Bipolar Transistor
A type of discrete semiconductor that combines a three-terminal bipolar transistor with a MOSFET. With the injection of minority carriers, its dynamic resistance can be made lower than that of a MOSFET. As a highly voltage-resistant yet relatively high-speed power transistor, IGBT is increasingly used in automobiles and air conditioners.
Immersion Lithography
A lithography technique in which the space between the optical imaging system and the wafer is filled with a liquid medium before exposure. Because the refractive index of a liquid medium is higher than that of air, the technique enhances the numerical aperture (NA) of the imaging apparatus and increases the resolution.
Integrated Circuit (IC)
A set of electronic circuits densely packed with ultra-small components on a die. There are two types of ICs: monolithic and hybrid. Monolithic ICs are the most common ICs in use today.
Kilby Patent
The most fundamental patent on the structure of integrated circuits. It is commonly known as the Kilby patent, named after its inventor Jack Kilby, who received the Nobel Prize in Physics in 2000.
Laser Diode
A diode that emits laser light. When a forward-biased current passes through the diode’s p-n junction, incoming electrons are recombined with holes to induce light emission. Indium gallium arsenide (InGaAs)-based diodes emit light with wavelengths between 1.3-1.55 μm, and are used for optical communications. Gallium nitride (GaN)-based diodes with wavelengths of 0.4μm, 0.6μm, 0.68μm, 0.78μm are also commonly used.
LCD
Liquid Crystal Display
Liquid crystals refer to materials consisting of specific organic molecules that are fluid yet retain the characteristics of crystals. When a voltage is applied, the orientation of liquid crystal molecules is aligned to polarize the light. An LCD uses this effect to control the pixels on the screen. Although liquid crystals themselves are not light-emitting, the screen image can be illuminated with backlight.
LCOS
Liquid Crystal On Silicon
A rear-projection display device. An LCOS chip consists of a silicon substrate covered with interconnect, mask, and reflective layers overlaid with a liquid crystal panel.
LEEPL
Low-Energy E-Beam Proximity Lithography
A type of lithography that transfers mask patterns on a target material in close proximity using a low-acceleration electron beam of 2 kV. Because of the low energy level involved, LEEPL can achieve high-resolution exposure with little proximity effect. The simple electron optics of LEEPL also reduces the equipment cost.
Light Emitting Diode (LED)
A semiconductor device that emits light when an electric current passes through it. An LED efficiently converts electrical energy into light without heat dissipation, which is a distinct advantage over a conventional light bulb. Also, LEDs are semi-permanently durable and can be made very small.
Linear IC
A type of analog ICs used for amplification, oscillation, frequency modulation, and/or processing of analog signals. Specifically, those analog ICs in which the input and output values are proportional are referred to as linear ICs. Linear ICs are classified into consumer grade and industrial grade devices.
Liquid Crystal Display Driver IC
A type of integrated circuit with transistors that control the pixels of a liquid crystal display (LCD). An LCD driver sends electrical signals to LCD’s electrical connectors to control its behavior, color tones, etc. There are two kinds of LCD drivers: gate drivers and source drivers.
Logic IC
A type of integrated circuit that performs logical operations. Logical ICs take the input signal as a set of logical values, perform logical operations using the digital values represented by 0 and 1, and output the results as another set of logical values. Representative logic ICs include MPUs, MCUs, DSPs, and FPGAs.
Low-K Material
A material with a low dielectric constant (k). Low-k materials are used as insulator films for logic interconnects. They are effective in reducing the interconnect latency because low-k films have lower parasitic capacitance than conventional silicon oxide films.
Mainframe
The main unit of a computer that houses such components as the CPU, main memory, channel controller, and memory controller. Mainframe often refers to a large general-purpose computer, which was dominant in the 1970s and early 1980s. Subsequently, mainframes gave way to workstations and Intel architecture-based personal computers.
MCU
Micro-Controller Unit
A type of LSI that integrates four basic elements of a microcomputer (data I/O, data processing, program memory [ROM], and data memory [RAM] units) on a single chip. In larger computing systems, the first two elements are combined in microprocessor units or MPUs, and ROM and RAM are provided as separate devices. MPUs are typically used for personal computers.
MEMS
Micro Electro Mechanical System
The technology that enables microscopic devices with electro-mechanical systems. MEMS devices have minuscule moving parts that are built within a chip using semiconductor processing technologies. The diverse functions enabled by these moving parts give MEMS wide-ranging applications (e.g., accelerometers, gyroscopes, and so on).
Microprocessor
A single LSI chip that is functionally analogous to the central processing unit of a large computer. A microprocessor performs various operations and controls.
Moore’s Law
A rule of thumb that the number of transistors in a large-scale integrated circuit would double every 18 months or so. This observation was made by Gordon Moore in 1965, who later co-founded Intel and became its chairman (now retired). In reality, the integration level has doubled every 24 months, but the pace of chip scaling is slowing lately.
MOSFET
Metal-Oxide-Semiconductor Field-Effect Transistor
A type of field-effect transistor (FET) that has the structure of a metal-oxide semiconductor (MOS). It is the most common transistor type in LSIs today. A MOSFET consists of a silicon substrate covered with a dielectric oxide film, on which a patterned conductive metal layer is deposited. When a voltage is applied to the gate terminal on top of the metal layer, electric current flows underneath the dielectric film.
MRAM
Magnetoresistive Random Access Memory
A random access memory technology with a memory cell structure that uses magnetoresistive elements instead of DRAM capacitors. The magnetoresistive element consists of two magnetic layers (one is pinned and the other is free) separated by a non-magnetic barrier. The resistivity of the element changes depending on the spin direction of the free-moving layer. Either numerical value 0 or 1 is assigned to each cell according to its resistivity change status, enabling data to be stored and read. Because an MRAM stores the data magnetically, it is non-volatile and requires no electricity to maintain data.
Multi-Chip Module (MCM)
An electronic assembly integrating a number of bare chips, including a CPU and peripheral logic devices, on a substrate. Because MCMs can be built by putting proven bare chips together, they take less time to package than SOCs. MCMs are often used for mobile phones that require high integration levels with very short development lead times.
Multi-Core MPU
A microprocessor unit (MPU) with two or more processing units called cores. The multi-core design allows faster operations while saving power.
N-Type Semiconductor (Negative Semiconductor)
N-Type Semiconductor (Negative Semiconductor)
In n-type semiconductors, free electrons move when a voltage is applied, carrying negative charge to produce an electric current. N-type semiconductors are created by doping quadrivalent elements (such as silicon and germanium) with trace amount of pentavalent elements (such as arsenic).
NAND Type Flash Memory
A type of non-volatile memory medium invented in 1987 by Fujio Masuoka (then a Toshiba employee). Compared to the NOR type flash memory, NAND flash is smaller in circuit scale, less costly, and offers larger capacities as well as faster read/write speeds. NAND flash is widely used for USB drives, memory cards for digital cameras, and storage devices for mobile phones and digital music players. As conventional chip scaling technology is reaching its limits, 3D structures have been introduced in flash memory devices in recent years.
Nano Imprint
A lithography technology for nanoscale pattern transference, which is attained by pressing a mold with predefined nanopatterns onto a substrate coated with a polymer film. The technology is attracting attention for its low cost and ease of volume manufacturing.
NOR Type Flash Memory
A type of non-volatile memory medium invented in 1984 by Fujio Masuoka (then a Toshiba employee). In 1988, Intel commercially released the first NOR type flash memory device. Compared to the NAND type flash memory, NOR flash is faster in read operations and superior in random accessibility, while its integration level and write speed are inferior. NOR flash is principally used in microcontrollers and as a firmware storage chip for devices that require high reliability but do not support hard disk drives, including routers, printers, digital cameras, GPS navigation systems, car electronics, and mobile phones.
OPC
Optical Proximity Correction
A photolithography enhancement technique for offsetting the optical proximity effect, a phenomenon in which photomask patterns transferred onto a photoresist under insufficient resolution develop inaccuracies. OPC offsets those image errors by adding intricate modifications to the original photomask pattern, so the projected image on the photoresist accurately reflects the intended circuit pattern.
Optoelectronics
A coinage combining opto- (a prefix meaning light) and electronics. The word refers to technologies enabling conversion of electric signals into light and vice versa. Representative optoelectronic devices include optical fibers and LEDs.
P-Type Semiconductor (Positive Semiconductor)
P-Type Semiconductor (Positive Semiconductor)
In p-type semiconductors, electron holes move when a voltage is applied, carrying positive charge to produce an electric current. P-type semiconductors are created by doping quadrivalent semiconductor materials (such as silicon) with trace amount of trivalent elements (such as boron).
Photolithography
A process of exposing a photomask pattern onto a photoresist-coated substrate to transfer the pattern using ultraviolet or visible light. Either a contact/proximity system or a projection system is used depending on the preferred exposure method.
Photomask
A plate used in a lithographic exposure system for transferring a circuit pattern onto a photoresist-coated wafer in the IC/LSI fabrication process. Typically, a photomask is a plate of fused quartz on which a circuit pattern is formed using chromium (Cr) or other opaque materials.
Photomask Equipment
A type of semiconductor manufacturing equipment used to fabricate photomasks by forming a pattern of integrated circuits on glass plates. Photomasks are similar in function to negative film. The mainstream mask-making technology has shifted from optical lens-based tools to electron beam lithography tools.
Photoresist
A light-sensitive resin coating used to transfer masked circuit patterns on a substrate by means of exposure and development. The type of photoresist in which the exposed portion is removed is called a positive photoresist, and one in which the exposed portion remains is called a negative photoresist.
Plasma Display
A type of flat panel display which, along with LCD, attracted a lot of attention as the next-generation display technology when it came out. A plasma display panel has numerous tiny cells encapsulating neon and other noble gases. When a voltage is applied, the gases in each cell light up and form images on the screen.
Printed Circuit Board (PCB)
An insulated substrate on which an electronic circuit pattern is formed. Capacitors and other electronic components are soldered on the PCB to complete the circuit. Among its varieties are multi-layered PCBs and flexible PCBs.
Rambus DRAM
Rambus Dynamic Random Access Memory
A type of DRAM developed by U.S.-based Rambus Incorporated featuring an ultra-fast interface. The device was originally touted to be the next-generation DRAM with a 500 MB/s bandwidth, which was five to ten times greater than conventional DRAMs. However, it failed to become the next industry standard due to stiff pricing, and was replaced by double data rate synchronous dynamic random-access memory (DDR SDRAM) devices. Today, Rambus DRAMs have very limited applications.
Semiconductor
A material that has a small band gap (the energy difference between the top of the valence band and the bottom of the conduction band) of around 0.7-6 eV. The material becomes conductive when it receives energy exceeding the band gap, but otherwise it is non-conductive.
SiC Wafer
A wafer made of SiC, a compound semiconductor material consisting of silicon (Si) and carbon (C). The material’s field strength for electrical breakdown is 10 times that of Si, and its band gap is three times wider. As SiC is also suitable for controlling a wide range of p- and n-type devices, it is attracting attention as a power device material that can be used in high-temperature, high-radiation environments. Because SiC has higher thermal conductivity than Si, it is also used to make semiconductor wafers.
Silicon Cycle
In the past when the consumption volume of semiconductors was dictated by supply and demand of computers, the semiconductor industry experienced periodic economic swings that repeated themselves roughly every four years—which is the rule of thumb known as the silicon cycle. The yearly growth of the semiconductor industry has in fact shown a cycle of peak and trough every three to four years until recently, but the pattern was broken as smartphones with short upgrade cycles became the sales driver in the increasingly diverse electronics market.
Silicon Interposer
Unlike a resin-based interposer, silicon interposer’s thermal expansion coefficient remains stable in a flip-chip mounting, which translates into beneficial electrical properties and excellent performance at high speeds and high frequencies, enabling more intricate wiring and bump formation.
Silicon Valley
A nickname for the southwestern portion of the San Francisco Bay Area in the U.S. where a large number of semiconductor chip manufacturers are concentrated. The name derives from the fact that monocrystalline silicon is the principal semiconductor material.
Silicon Wafer
A principal material for manufacturing semiconductors. Silicon wafers are made by melting silicon into a 99.999999999% pure cylindrical ingot and slicing it into discs of less than 1 mm in thickness. A grid of intricate circuit patterns is formed on the wafer surface, and then cut into separate semiconductor chips.
Single Electron Transistor
Unlike a conventional transistor that functions with an electrical current consisting of a flow of about 10,000 to 100,000 electrons, a single electron transistor uses a phenomenon called Coulomb blockade and can operate with a flow of only one electron. Once single electron transistors are successfully applied to ICs, they would significantly reduce the power consumption and heat generation levels associated with conventional ICs.
SiP
System In Package
A module that encloses a number of ICs and passive components (memory chips, ASICs, controllers, etc.) to function as an electronic system. SiP has an advantage over SoC (system on a chip) in terms of lead time and production cost.
SOI Wafer
Silicon On Insulator Wafer
A layered silicon-insulator-silicon wafer. Because it contains a layer of electrical insulator, the wafer is suitable for manufacturing high voltage-resistant devices. The transistor leakage can be curtailed by making the channel layer thinner, which could lower power consumption.
Spintronics
The study in engineering concerning the use of electric charge of an electron and its intrinsic spin. The word is a coinage combining “spin” and “electronics.” A representative achievement in this field of study is the discovery of the giant magnetoresistive effect in 1988, which came to be applied to magnetic heads of hard disc drives.
Sputtering
A process for depositing a thin film on the surface of a substrate. Also known as physical vapor deposition (PVD). The substrate to be covered by a film is placed in a vacuum together with the source material (target). When the target is hit by highly accelerated argon molecules, electrons, etc., the target molecules are ejected and deposited on the substrate, either directly or after chemically reacting with other gaseous materials introduced in the reactor.
Sputtering Equipment
A type of thin-film deposition tool. Its reactor is vacuumed and has no interference from the external environment. As a highly accelerated inactive material (such as argon) hits the target material like metals or ceramics, target molecules are ejected and deposited on the substrate, either directly or after chemically reacting with other gaseous materials introduced in the reactor.
Standard Cell
A type of semi-custom LSI that combines and interconnects pre-designed and standardized functional cells to enable a system on a chip. Each functional cell is optimally designed so the chip’s footprint is used more efficiently than in a gate array.
Stepper
A device for optically shrinking and transferring circuit patterns from a photomask (reticle) via lenses onto the wafer set on a stage. Light sources used for exposure include visible light (g-line), ultraviolet light (i-line), excimer laser (KrF, ArF, etc.) and so forth.
Structured ASIC
A type of ASIC introduced as an answer to continued chip scaling and shorter product cycles. A structured ASIC uses a number of fixed layers to reduce the cost of mask and mask development as well as to speed up development.
System LSI (also called System On A Chip)
An LSI that integrates the functions and intellectual property (IP) cores of several separate ICs onto a single chip so it serves as a complete system. System LSIs, also known as systems on a chip (SoCs), are considered to be the future mainstream of semiconductor devices.
TAB
Tape Automated Bonding
An automated process for electrically attaching LSI chip’s connectors to a substrate using a tape (i.e., film carrier). Packaging of LSIs using TAB is called tape carrier package (TCP).
TFT
Thin Film Transistor
A transistor based on a thin film of amorphous and/or multi-crystalline silicon. It is typically used in liquid crystal displays (LCDs). TFT LCD, which uses active matrix thin film transistors, is the mainstream technology for LCDs.
Thin Film
A film with a thickness of several thousand angstroms (1 angstrom = 1/100,000,000 cm) or less. Resistors and capacitors are made by depositing a thin film of metal or a dielectric material on a ceramic or glass substrate, using processes such as chemical vapor deposition and sputtering.
Transistor
A small and lightweight three-terminal semiconductor device, often used in electronic circuits of oscillators and amplifiers. It was invented in 1948 by William Shockley, who received the Nobel Prize in Physics for this achievement in 1956 along with two others. ICs and LSIs are devices in which large numbers of transistors are integrated. There are a few theories about the etymology of the word “transistor,” one of which argues that it is an abbreviated combination of “trans-“ (as in transfer) and “resistor.”
TSOP
Thin Small Outline Package
A type of thin IC package made of plastic, typically used for a memory (DRAM) module. It is a kind of small outline package (SOP) characterized by two parallel rows of electrical connecting pins, except that TSOP has to be 1.27 mm or less in height when mounted on the substrate, with a resin component of 1 mm in thickness.
Tunnel Effect (also called Tunneling or Quantum Tunneling)
Tunnel Effect (also called Tunneling or Quantum Tunneling)
A phenomenon at the quantum scale in which a particle tunnels through a barrier that should be insurmountable in terms of classical physics. This quantum effect, also known as tunneling or quantum tunneling, can be explained by the uncertainty principle.
Tunnel Magneto-Resistance (TMR) Effect
A magneto-resistance effect that occurs in a magnetic tunnel junction (MTJ). When a voltage is applied to the junction, electrons tunnel through the insulator and change the electrical resistance of the junction. The effect is being applied to the MRAM device, and is also expected to radically enhance the storage density of hard disk drives, as the memory cells using the TMR effect will be far smaller than those that depend on electromagnetic induction.
Ultra-Pure Water
Water that has been purified to attain extremely low levels of conductivity, particles, bacteria, total organic carbon (TOC), etc. In LSI manufacturing processes, ultra-pure water is used to cleanse wafers. As the semiconductor integration level rises, so does the required level of water purity.
Ultra-Thin Substrate
An interposer that substitutes a lead frame to carry a chip. Chips for mobile phones and thin digital signal controllers (DSCs) require a low profile package consisting of a very thin chip combined with a substrate of less than 100μm in core thickness.
Ultra-Thin Wafer
Chip size packages (CSPs) and multi-chip packages (MCPs) found in advanced digital appliances are made possible by ultra-thin wafers of less than 100 μm in thickness. Development of 50μm-thick wafers is ongoing, but the issue of their delicate handling still needs to be addressed.
UV Lithography
A photolithography process used in semiconductor fabrication that uses ultraviolet (UV) light as the source. The process typically uses a light source producing the spectral line at 436 nm (g-line) or at an even shorter wavelength of 365 nm (i-line).
Wafer
A thin and circular slice of semiconductor material used for manufacturing ICs. Wafers are typically 0.6-0.8 mm in thickness, and the diameter can be as large as 450 mm, although the most common wafer diameter seen in mass production is 300 mm, followed by 200 mm. A large number of semiconductor devices are formed on a wafer, which are then cut into IC chips using a machine called dicer or scriber.
Wire Bonding
A process of connecting an IC chip contact pad with lead frame connectors by means of metal wire. Typically, gold wire with a diameter of 30 microns is used for this purpose in a fully automated process.
WLCSP
Wafer Level Chip Size Package
A type of chip size package (CSP) that uses an advanced technology to encase an IC device in resin while it is still part of the wafer. Because WLCSP’s package size is virtually the same as a bare chip and finer bump pitch can be easily achieved, it is widely used for mobile phone IC chips.
X-Ray Lithography
A lithography technology that uses as the light source soft X-rays (wavelengths: about 0.5 nm – 1.5 nm) emitted from synchrotron orbital radiation (SOR) facilities.
ZnO LED
Zinc Oxide-Based Light Emitting Diode
An LED that uses zinc oxide (ZnO) for an epitaxial layer. It emits blue and ultraviolet light just as a GaN LED does. ZnO LEDs have several advantages over GaN LEDs: they cost less to produce, can use a lower wavelength range to broaden the choice of fluorescent materials, and emit light at higher temperatures.
2.5D IC
an integrated circuit (IC) formed by placing multiple integrated circuit (IC) dies side by side on an interposer, although some 2.5D ICs use some vertical stacking; may use through silicon vias (TSVs) in the interposer
3D IC
an integrated circuit (IC), formed by stacking wafers and/or dies vertically (three-dimensional) and connecting them electrically using through-silicon vias (TSVs)
3D NAND
a device architecture in which memory cells are arranged vertically (three-dimensional), rather than horizontally (planar) to increase memory bit density
3D TRANSISTOR
a transistor architecture formed vertically (three-dimensional, for example, a FinFET), rather than horizontally (planar)
4F2
pronounced “four F squared,” a specific DRAM structure that is crucial for enhancing memory performance as device dimensions continue to shrink; seen as a critical requirement for emerging and future chip inflections, including 1,000-layer 3D NAND and advanced gate-all-around (GAA) logic
ADSORPTION
the process by which molecules or atoms from a gas or liquid adhere to the surface of a solid material
ADVANCED PACKAGING
a term encompassing modern semiconductor packaging technologies that go beyond traditional wire bonding to achieve higher performance smaller form factors and improved thermal management; includes fan out wafer level packaging (FOWLP), system-in-package, and various 2.5D and 3D integration methods
AHM
see ashable hardmask
ALD
see atomic layer deposition
ALE
see atomic layer etching
ANGSTROM (Å)
a unit of length equal to 1 x 10−10 meters
ANISOTROPIC
in semiconductor manufacturing, a term used to describe a process that is directional (versus isotropic, or uniformly in all directions)
ANNEAL
a process used to change the properties of materials through controlled heating
ANTI-REFLECTIVE LAYER (ARL)
a thin layer of light-absorbing material deposited on top of reflective materials on the wafer to improve photolithography results
AR
see aspect ratio
ARL
see anti-reflective layer
ASHABLE HARDMASK (AHM)
a carbon-based patterning film often used for its ability to provide better selectivity to and protection of underlying layers than conventional photoresist; easily removed by a dry process, such as ashing
ASHING
a type of strip process that removes organic materials, typically photoresist, by using heat and plasma
ASPECT RATIO (AR)
the comparison of the height to the width of a geometric shape (for example, 20:1)
ATOMIC LAYER DEPOSITION (ALD)
a deposition technique that lays down a thin film, typically a few atomic layers at a time; uses cycles of sequential, self-limiting reactions
ATOMIC LAYER ETCHING (ALE)
an etch technique that removes materials, typically a few atomic layers at a time; uses cycles of sequential, self-limiting reactions
BACK END
the set of process steps including packaging (external connection) and device testing that complete semiconductor manufacturing; follows front end processes
BACK-END-OF-LINE (BEOL)
the set of steps that form the interconnect structures (wiring); follows front-end-of-line (transistors) and middle-of-line (contacts) processes
BACKSIDE POWER
Refers to routing power lines through the backside of a semiconductor wafer to reduce power delivery noise and improve power integrity, enabling higher device densities
BARRIER
a thin layer deposited between two materials to prevent their interaction
BEOL
see back-end-of-line
BEVEL
the rounded or slanted area of the very edge of a wafer
BEVEL CLEAN
a process that removes unwanted material from the wafer’s edge that can otherwise migrate to the active die area and negatively impact device performance or yield; may be a dry process (using plasma) or wet process (using liquid chemicals)
BIT LINE
the path used to read and write information to memory cells; connects the sources/drains of the cells in a column that makes up a two-dimensional array
CAPACITIVELY COUPLED PLASMA (CCP)
a type of plasma source in which the plasma is formed between two electrodes, typically closely spaced, which are connected to an RF power supply (one may also be connected to ground)
CAPACITOR
a component used to store an electric charge, consisting of one or more pairs of conductors separated by an insulator; used in both logic and memory devices
CAR
see chemically amplified resist
CCP
see capacitively coupled plasma
CD
see critical dimension
CHANNEL
the conductive path electrons (or holes) follow through a semiconductor; current flow through the channel is controlled by voltage applied across the gate and source terminals
CHEMICAL VAPOR DEPOSITION (CVD)
a process that uses controlled reactions of volatile chemicals to deposit a dielectric or conductive film
CHEMICALLY AMPLIFIED RESIST
a type of wet resist that uses acid to catalyze reactions during the post-exposure bake, significantly enhancing the resist’s sensitivity to light
CHIP
short for “microchip”; a set of electronic circuits on a small section of a semiconductor wafer; also called a die
CHIPLET
functional circuit blocks, often reusable intellectual property (IP) blocks, that are manufactured and recombined on a high-density interconnect
CLEANING
see wafer cleaning
CLEANROOM
an enclosed area strictly controlled for airborne contamination, humidity, and temperature to be suitable for manufacturing semiconductor devices
CMOS
see complementary metal oxide semiconductor
COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS)
a common type of semiconductor technology that uses complementary pairs of p-type and n-type metal oxide semiconductor field effect transistors (MOSFETs) for logic functions
CONDUCTOR
a material in which electricity flows easily (for example, a metal) that is used to electrically connect components in a semiconductor device
CONFORMAL
a term used to describe uniform coverage of a layer of material over pre-existing topography; thickness of the layer remains the same everywhere on the surface of the feature
CONTACT
the conductive connection between the transistor and the first interconnect layer
COPPER INTERCONNECT
the connections (wiring) of an integrated circuit using copper as the conductive material; offers higher electrical conductivity (faster) than aluminum interconnect
COPPER OVERBURDEN
excess copper deposited on top of the wafer after filling vias and trenches; later removed using chemical-mechanical planarization (CMP)
CRITICAL DIMENSION (CD)
dimension (width) of the smallest feature on the device that must be precisely fabricated to ensure proper device performance and/or yield
CVD
see chemical vapor deposition
DAMASCENE
a technique of forming conductive connections (wiring) between circuits by inlaying conductive materials, such as copper, into insulating layers
DEEP SILICON ETCHING
an anisotropic (directional) plasma etch process that creates high aspect ratio (tall and narrow) features in silicon; applications include MEMS devices and TSV structures
DEFECT
any contamination (such as particles or residues) or structural flaw (such as voids); can negatively impact device performance and/or yield
DEFECTIVITY
a measure of the level or degree of defects, including quantity, size, and type; often a comparison against a desired or acceptable level
DEPOSITION
a process that lays down the insulating or conducting materials that make up a semiconductor device
DESCUM
a process that removes a very light organic residue, for example, at the bottom of a trench; typically a plasma process
DEVICE GENERATION
see technology node
DIE
a term used to describe a single semiconductor chip on a wafer
DIELECTRIC
a non-conductive material used to insulate conductive components in a device
DIGITAL TWIN
the virtual representation of a process or physical asset that allows designers and maintenance professionals to understand and predict how the process or asset behaves
DIRECTED SELF-ASSEMBLY (DSA)
a patterning technology that uses block co-polymers to define patterns
DOUBLE PATTERNING
a multiple patterning technique that increases feature density by a factor of two compared to using a single lithography step; involves either decomposing the mask into two easier-to-print lithography steps or using self-aligned double patterning (SADP)
DPT
double patterning technology; see double patterning
DRAM
see dynamic random access memory
DSA
see directed self-assembly
DYNAMIC RANDOM ACCESS MEMORY (DRAM)
a type of volatile memory (needs power to retain data) that can be electrically refreshed; with dynamic RAM, each bit of data is stored in a separate capacitor, which needs to be refreshed repetitively
ECD
see electrochemical deposition
ECP
electrochemical plating; see electrochemical deposition
EDGE EXCLUSION (EE)
the outermost distance from the wafer’s edge, usually indicated in millimeters, where it is generally more difficult to achieve good process results; the lower the edge exclusion, the larger the wafer area where good process results are achieved
EE
see edge exclusion
ELD
see electroless deposition
ELECTROCHEMICAL DEPOSITION (ECD)
a plating technique that deposits a metal layer by passing an electrical current through a chemical solution using the wafer as an electrode; also referred to as electrochemical plating (ECP) or electroplating
ELECTROLESS DEPOSITION (ELD)
a plating technique that deposits a metal layer using a chemical process and relies on the presence of a reducing agent; unlike electrochemical deposition, electroless deposition does not use external electrical power
ELECTROMIGRATION
the movement of atoms or ions in a metal line (interconnect) during high current flow through momentum transfer from electrons to metal atoms; can create voids in the line and eventually prevent current flow or cause device failure
ELECTROPLATING
see electrochemical deposition
ELECTROSTATIC CHUCK (ESC)
a piece of hardware that holds the wafer in place by using a static voltage field, in contrast to vacuum-based or physical clamping
ESC
see electrostatic chuck
ETCH
a process that selectively removes material to create desired features and patterns of a semiconductor device; includes dry (using plasma) and wet (using liquid chemistries) processes
EUV
see extreme ultraviolet
EXTREME ULTRAVIOLET (EUV)
light in the 13.5-nm wavelength used in advanced lithography to create intricate patterns on semiconductor chips
FAB
a facility that manufactures semiconductor products; short for “fabrication”
FAN OUT WAFER LEVEL PACKAGING (FOWLP)
an advanced packaging technique that creates a package in a round 300/330 mm format
FEOL
see front-end-of-line
FET
see field effect transistor
FIELD EFFECT TRANSISTOR (FET)
a type of transistor that uses an electric field to control the electrical conductivity of a channel in a semiconductor material
FINFET
a 3D transistor architecture with tall, fin-like structures that enables smaller overall device dimensions and lower power relative to those with planar (side-by-side) transistors of similar feature sizes
FLASH MEMORY
a non-volatile type of memory (does not need power to retain data) that can be electrically erased and rewritten; a common form of flash memory is NAND
FLIP CHIP
a packaging method that creates electrical connections between semiconductor devices by “flipping” the chip face-down to bond to the external circuitry
FOUNDRY
a wafer fabrication facility that manufactures another company’s semiconductor products as a service
FOUP
see front-opening unified pod
FOWLP
see fan out wafer level packaging
FRONT END
the set of wafer processing steps that include forming the transistors (front-end-of-line, FEOL), contacts (middle-of-line, MOL), and wiring (back-end-of-line, BEOL); followed by back end processes
FRONT-END-OF-LINE (FEOL)
the set of process steps to form transistors and other circuit elements (such as resistors and capacitors) that are later connected electrically with middle-of-line (contacts) and back-end-of-line (wiring) processes
FRONT-OPENING UNIFIED POD (FOUP)
a specialized wafer carrier used to transport wafers from one processing tool to the next; used to minimize exposure to contamination
GAA
see gate-all-around
GAPFILL
a type of deposition process that fills narrow spaces with insulating or conducting material
GATE
one of three terminals of a field effect transistor; current flow between source and drain terminals is controlled by applying or removing voltage to the gate
GATE STACK
the set of insulating and conducting layers that make up the gate of a field effect transistor
GATE-ALL-AROUND (GAA) FET
a type of three-dimensional, multi-gate field effect transistor (FET) designed to have a gate wrapping around all sides of the channel; improves current flow control while enabling continued transistor scaling; also referred to as nanowire FET
HAR
see high aspect ratio
HARDMASK
a film that is more resistant to etching than conventional photoresist, thereby better protecting underling layers from alteration; typically used when high-selectivity etching is required
HDP-CVD
see high-density plasma chemical vapor deposition
HETEROGENEOUS INTEGRATION
the process of integrating different types of dies or chips into a single package using advanced packaging, typically increasing the performance of devices by placing logic and memory closer together
HIGH ASPECT RATIO (HAR)
refers to very tall and narrow device features, for example, DRAM capacitor cells; the higher the aspect ratio of a feature, the more challenging it is to create; see also aspect ratio
HIGH-DENSITY PLASMA CHEMICAL VAPOR DEPOSITION (HDP-CVD)
a CVD process that employs an inductively coupled plasma (ICP) source to deposit material; the ICP source generates a higher plasma density than typical occurs in PECVD
HIGH-K DIELECTRIC
an insulating material with a high dielectric constant (k) value (for example, hafnium oxide) that is used in a transistor gate stack to lower transistor leakage
IC
see integrated circuit
ICP
see inductively coupled plasma
ILD
see interlayer dielectric
IMD
see intermetal dielectric
INDUCTIVELY COUPLED PLASMA (ICP)
a type of plasma source in which plasma is formed when radio frequency (RF) energy is coupled into a gas by an inductive coil through transformer action
INFLECTION
a revolutionary change in process technology; these changes, in turn, drive development of new semiconductor manufacturing capabilities; examples include the change from aluminum to copper interconnects and the introduction of multiple patterning techniques
INTEGRATED CIRCUIT (IC)
a single, complete semiconductor product of electrically connected components (such as transistors and capacitors) fabricated on the same substrate
INTERCONNECT
the intricate wiring that forms electrical connections between components in an integrated circuit
INTERLAYER DIELECTRIC (ILD)
an insulating material that provides electrical isolation between conducting layers
INTERMETAL DIELECTRIC (IMD)
an insulating material that provides electrical isolation between metal lines
INTERPOSER
the layer between the package substrate and the CPU die made of silicon or organic material that facilitates electrical connections between multiple chips or dies on a package
ISOTROPIC
in semiconductor manufacturing, a term used to describe a process that is the same in all directions (versus anisotropic, or directional)
K VALUE
dielectric constant, the measure of a material’s ability to store an electric charge
LED
see light-emitting diode
LELE
see litho/etch/litho/etch
LIGHT-EMITTING DIODE (LED)
a semiconductor device that emits infrared, visible, or ultraviolet light when an electric current flows through it
LITHO/ETCH/LITHO/ETCH (LELE)
a double patterning process that involves splitting a given pattern into two less dense patterns to compensate for lithography resolution limitations; each pattern requires one lithography step and one etch step
LITHOGRAPHY
a process that transfers patterns from a photomask to the wafer
LOGIC
a chip consisting of circuit elements that together perform a function using various types of mathematical operations, for example, microprocessors; can be thought of as the “brains” of an electronic device
LOW-K DIELECTRIC
an insulating material that has a dielectric constant (k value) lower than that of silicon dioxide (~3.9); commonly used in interconnect structures
MAGNETORESISTIVE RANDOM-ACCESS MEMORY (MRAM)
a non-volatile memory technology that uses magnetic storage elements rather than conventional electric charges to store data
MASK
a layer of material that protects certain areas of the wafer while other areas are being processed; generally later removed; also short for photomask, typically a transparent negative used to print a pattern during lithography
MEMORY CELL CAPACITOR
the storage part of a DRAM cell; information is retained as a charge in the capacitor
MEMS
see micro-electromechanical system
METAL GATE
a type of transistor gate where the material used for the gate electrode is a metal, rather than traditional polysilicon
METAL HARDMASK (MHM)
a metal layer that may be used in critical patterning applications to improve etch selectivity and profile control
METALLIZATION
the process of depositing metal films, for example, the tungsten contacts and copper interconnects (wiring) in an integrated circuit
MHM
see metal hardmask
MICRO-ELECTROMECHANICAL SYSTEM (MEMS)
a miniature device generally consisting of a central component for data processing (such as a microprocessor) and other components that interact with their surroundings (such as micro-sensors)
MICRON (µm)
a unit of length equal to 1 x 10−6 meters; also known as micrometer
MICROPROCESSOR
a type of logic chip; also called a central processing unit (CPU)
MIDDLE-OF-LINE (MOL)
the set of wafer processing steps used to create the structures that provide the local electrical connections between transistors; mainly gate contact formation; occurs after front-end-of-line (transistors) and before back-end-of-line (wiring) processes
MILLIMETER (mm)
a unit of length equal to 1 x 10-3 meters; commonly used in the semiconductor industry to describe the diameter of a silicon wafer, for example, a 300 mm wafer
mm
see millimeter
MO
see molybdenum
MOL
see middle-of-line
MOLYBDENUM
an industry alternative to tungsten as devices shrink: its lower resistivity allows more electrical currents to flow through easily
MOORE’S LAW
an observation made by Gordon Moore in 1965 and later revised in 1975 that the number of transistors in an integrated circuit doubles roughly every two years, while the cost per IC decreases
MRAM
see magnetoresistive random-access memory
MSSD
see multi-station sequential deposition
MSSP
see multi-station sequential processing
MULTI-STATION SEQUENTIAL DEPOSITION (MSSD)
a tool architecture with multiple deposition stations designed to improve film uniformity; allows multiple wafers to be processed at the same time, thereby also improving productivity
MULTI-STATION SEQUENTIAL PROCESSING (MSSP)
a tool architecture with multiple stations designed to improve process repeatability; also allows processing multiple wafers at the same time, thereby also improving productivity
MULTIPLE PATTERNING
a manufacturing strategy used to create patterns that are more dense than would be possible with a single lithography step; involves decomposing a pattern into two or more separate, easier-to-print lithography steps or using a self-aligned patterning technique
NA
see numerical aperture
NAND
short for “NOT AND” flash memory; a type of memory cell that connects transistors often used in memory cards, USB drives, and solid state drives
NANOMETER (nm)
a unit of length equal to 1 x 10−9 meters; commonly used in the semiconductor industry to describe device dimensions as well as technology nodes, for example, the 10 nm node
nm
see nanometer
NODE
see technology node
NON-UNIFORMITY
a measure of the inconsistency or variation of a process result on the wafer, for example, changes in film thickness; low non-uniformity is desirable
NUCLEATION LAYER
a thin layer of material generally used to aid subsequent metal film growth, for example, tungsten CVD for gapfill
NUMERICAL APERTURE (NA)
a measure of an optical system’s ability to collect and focus light; the higher the NA, the more light that is captured and the finer the details
OEM
see original equipment manufacturer
ORIGINAL EQUIPMENT MANUFACTURER (OEM)
a supplier that designs and manufactures equipment; in the semiconductor industry, distinguished from second-source suppliers who market components for equipment they do not design or manufacture
OXIDE
an insulating material; usually refers to silicon dioxide (SiO2)
PACKAGING
the process of enclosing a chip in a protective container (package) and providing power and signal connectivity
PANEL-LEVEL PACKAGING (PLP)
an advanced packaging technique where chips are attached to larger format substrates that could be round, square, or rectangular
PARTICLE
a miniature piece of unwanted material on the wafer; depending on its size and location, may be a defect that impacts device performance or yield
PATTERNING
the processes involved in creating the features of an integrated circuit; includes design transfer using lithography and steps such as deposition and etch
PECVD
see plasma-enhanced vapor deposition
PHOTORESIST (PR)
a photosensitive material used to transfer a pattern onto a wafer during photolithography; defines the areas that will subsequently be processed
PHOTORESIST STRIP
a process that removes remaining photoresist from the wafer, typically following ion implant or etch processes; usually a dry process (using plasma) but may also be a wet process (using liquid chemicals)
PHYSICAL VAPOR DEPOSITION (PVD)
a process that deposits a thin, conductive film by using sputtering
PITCH
the distance from the center of one feature to the center of an adjacent feature, for example, from the center of one metal line to the center of an adjacent line
PLASMA
a state of matter made up of free electrons and ions; created by sending a charge through a gas
PLASMA ETCH
a process in which plasma is used to selectively remove material from the wafer through chemical and/or physical (ion bombardment) mechanisms
PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION (PECVD)
a process that uses a plasma to lower deposition temperatures relative to conventional chemical vapor deposition (CVD)
PLP
see panel level packaging
PMD
see pre-metal dielectric
PR
see photoresist
PRE-METAL DIELECTRIC (PMD)
an insulating material that provides electrical isolation between the transistors and the first interconnect layer
PROCESS FLOW
the order in which a set of semiconductor manufacturing processes is performed to fabricate devices on a wafer; there may be several hundred individual steps in a process flow
QPT
quadruple patterning technology; see quadruple patterning
QUADRUPLE PATTERNING
a multiple patterning technique that increases feature density by a factor of four compared to using a single lithography step; involves either decomposing the mask into multiple easier-to-print lithography steps or using self-aligned quadruple patterning (SAQP)
RDL
see redistribution layer
REACTIVE ION ETCH (RIE)
a plasma etch process involving chemically reactive species (ions) that are accelerated toward the wafer in a low-pressure environment
REDISTRIBUTION LAYER (RDL)
an extra layer added to the chip during packaging to re-route electrical connection points
RESIDUE
unwanted material left on the wafer from previous processes; depending on the location and quantity, may be a defect that impacts device performance and/or yield
RESIST
see photoresist
RETICLE
also called a photomask or mask; a plate with transparent and opaque areas that allow ultraviolet light to shine through to create a pattern onto a wafer
RIE
see reactive ion etch
SAC
see self-aligned contact
SADP
see self-aligned double patterning
SAQP
see self-aligned quadruple patterning
SEED LAYER
an ultra-thin film deposited to help initiate subsequent deposition; sometimes referred to as a nucleation layer
SELECTIVITY
a measure of the different removal rates between two materials; the faster one material is removed relative to another, the higher the selectivity
SELF-ALIGNED CONTACT (SAC)
a method of creating device contacts by using etch selectivities to follow the sidewall contour of the gate
SELF-ALIGNED DOUBLE PATTERNING (SADP)
a multiple patterning technique that increases feature density by 2X by depositing a spacer film on the sidewalls of a lithographically defined feature, followed by removing that original feature; the remaining spacers are then used to define the final pattern
SELF-ALIGNED QUADRUPLE PATTERNING (SAQP)
a multiple patterning technique that increases feature density by 4X by using repeated spacer films (similar to self-aligned double patterning) to define the desired pattern
SEMICONDUCTOR
a material with electrical conductivity between that of a conductor and an insulator; silicon is a commonly used semiconductor
SEMICONDUCTOR MANUFACTURING
the complete fabrication of semiconductor chips from front end (device and wiring) through back end (assembly, packaging, and test) processes
SEMICONDUCTOR MANUFACTURING EQUIPMENT
see wafer fabrication equipment
SHALLOW TRENCH ISOLATION (STI)
a structure that separates neighboring transistors or memory cells; a shallow trench is etched then filled with an insulating material
SINGLE-WAFER CLEAN
a process that removes particles and other materials one wafer at a time, in contrast to batch (multiple wafers); includes wet (using liquid chemistries) and dry (using plasma) processes
SIP
see system in package
SPACER
a deposited film commonly used to passivate sidewalls of the gate stack and to control the placement of dopants during ion implantation; also used to define the pattern in self-aligned multiple patterning schemes
SPIN CLEAN
a wet clean process in which the wafer is rotated at high velocity while being treated with chemical solutions; removes films, particles, and other contaminants that could affect device performance or yield
STI
see shallow trench isolation
SUBSTRATE
the starting material for the semiconductor manufacturing process, typically silicon; also referred to as a wafer
SYSTEM IN PACKAGE (SIP)
a packaging technology that combines integrated circuits of different functionalities into a single module that performs as a unified system
TECHNOLOGY NODE
commonly used to describe a device generation, for example, the 65 nm technology node is followed by the 45 nm technology node; historically referred to the smallest feature dimension
THERMAL BUDGET
the maximum thermal energy (determined by processing temperature and time) allowed for wafer fabrication processes to meet desired device performance and yield requirements
THIN FILM DEPOSITION
the process of forming sub-microscopic layers of conducting or insulating materials; includes dry processes (using plasma, such as PECVD) and wet (using liquid chemistries, such as ECD)
THROUGH-SILICON VIA (TSV)
a high aspect ratio structure that creates vertical electrical connections through a die or a wafer; enables higher functionality and smaller form factor
TRANSISTOR
a component that is used to amplify or switch electronic signals and electrical power; a primary component of an integrated circuit, which can contain up to several billion transistors
TRENCH
a long, narrow feature formed by anisotropic (directional) etching; can be shallow or deep
TSV
see through-silicon via
UBM
see underbump metallization
ULTRA LOW-K DIELECTRIC
an insulating material that has a dielectric constant (k value) generally less than 2.0-2.5; introducing porosity into the material is one way to obtain ultra low-k films
ULTRAVIOLET THERMAL PROCESSING (UVTP)
a technique that modifies the characteristics of a film through exposure to ultraviolet (UV) light and heat; used, for example, to improve the integrity of low-k films
UNDERBUMP METALLIZATION (UBM)
a metal deposition process that creates the electrical connection from the silicon die to a solder bump; used in packaging
UNIFORMITY
a measure of the consistency of process results (such as etch CD); may be measured within a die, across a wafer, from one wafer to another wafer, etc.; high uniformity is desirable
UVTP
see ultraviolet thermal processing
VARIABILITY
a measure of the difference in process results (such as film thickness); may be measured within a die, across a wafer, from one wafer to another wafer, etc.; low variability is desirable
VIA
an electrical pathway that connects two conductive layers
VIRTUAL TWIN
see digital twin
VOID
a gap or hole defect where material is missing in a structure (such as a hole in a via); may be a defect that impacts device performance or yield
WAFER
a round disk made of semiconducting material, often less than a millimeter thick; multiple chips are fabricated on each wafer; wafer sizes are defined by their diameter, for example, a 300 mm wafer
WAFER CLEANING
the process of removing particles, contaminants, and/or other unwanted materials from the wafer during manufacturing; includes wet (using liquid chemistries) and dry (using plasma) processes
WAFER FABRICATION EQUIPMENT (WFE)
the tools or machines used to manufacture integrated circuits
WAFER-LEVEL PACKAGING (WLP)
a strategy for packaging integrated circuits while they are still part of the wafer; in contrast to conventional packaging methods, which first slice the wafer into dies and then package each die individually
WAFER-TO-WAFER UNIFORMITY
a measure of the consistency in wafer processing results (such as etch profile) from one wafer to another; high uniformity is desirable
WET CLEAN
the process of removing particles, contaminants, and/or other unwanted materials using liquid chemistries
WFE
see wafer fabrication equipment
WITHIN-WAFER UNIFORMITY
a measure of the consistency in wafer processing results (such as film thickness) across a wafer; high uniformity is desirable
WLP
see wafer-level packaging
WORD LINE
the path used to select all the memory cells in a row; connects the gates of the cells in a row that makes up a two-dimensional array
YIELD
the percentage or number of die that pass all testing and meet specified performance criteria (sometimes referred to as “good die”); high yield is desirable
